A Guide to the Internet of Things (IoT)

The Big Data Bang 1.png

The “Internet of Things” is exploding. It is made up of billions of “smart” devices—from minuscule chips to mammoth machines—that use wireless technology to talk to each other (and to us). Our IoT world is growing at a breathtaking pace, from 2 billion objects in 2006 to a projected 200 billion by 2020.1 That will be around 26 smart objects for every human being on Earth!

Where the Wireless Things Are—and Why


Most IoT smart devices aren’t in your home or phone—they are in factories, businesses, and healthcare.

Why? Because smart objects give these major industries the vital data they need to track inventory, manage machines, increase efficiency, save costs, and even save lives. By 2025, the total global worth of IoT technology could be as much as USD 6.2 trillion—most of that value from devices in health care (USD 2.5 trillion) and manufacturing (USD 2.3 trillion).

A Spectrum of Smart Stuff


Tiny Stuff: Smart Dust

Computers smaller than a grain of sand can be sprayed or injected almost anywhere to measure chemicals in the soil or to diagnose problems in the human body.

Enormous Stuff: An Entire City

Fixed and mobile sensors dispersed throughout the city of Dublin are already creating a real-time picture of what is happening, and will help the city react quickly in times of crisis.


These ubiquitous money dispensers went online for the first time way back in 1974.

The Birth of the Web

Computers and modems had been around for years, but only until the World Wide Web made its debut in 1991 were they united to revolutionize computing and communications.

New Stuff


Digital Locks

Smartphones can be used to lock and unlock doors remotely, and business owners can change key codes rapidly to grant or restrict access to employees and guests.

Smart Buildings

Brand-new buildings let owners and occupants “monitor, manage, and maintain all aspects of the building that impact operations, energy, and comfort,” according to the Smart Buildings Institute, which has certified buildings in Saudi Arabia and San Salvador.

A Facebook for Things


As TechCrunch puts it, the ultimate IoT prize “is to become the software platform upon which all vertical applications in the Internet of Things will be built.” Besides SmartThings and Ninja Blocks, Everything is making a play to be the central platform—calling itself a “Facebook for the Internet of Things.”

Stuff Yet to Come


Man-Machine Mind Meld

IoT devices are now able to collect data on the human body, but new research is testing our ability to control machines—and even each other—with our minds. This new wireless frontier could yield life-changing and life-saving advances.

We, Robots

Someday soon, connected robots will have the ability to learn from each other and work in teams to increase efficiency and solve scientific problems.



Cache memory is intended to give memory speed approaching that of the fastest memories available, and at the same time provide a large memory size at the price of less expensive types of semiconductor memories. The concept is illustrated in Figure (a) below. There is a relatively large and slow main memory together with a smaller, faster cache memory. The cache contains a copy of portions of main memory.


When the processor attempts to read a word of memory, a check is made to determine if the word is in the cache. If so, the word is delivered to the processor. If not, a block of main memory, consisting of some fixed number of words, is read into the cache and then the word is delivered to the processor. Because of the phenomenon of locality of reference, when a block of data is fetched into the cache to satisfy a single memory reference, it is likely that there will be future references to that same memory location or to other words in the block.

Figure (b) depicts the use of multiple levels of cache. The L2 cache is slower and typically larger than the L1 cache, and the L3 cache is slower and typically larger than the L2 cache.


Above figure depicts the structure of a cache/main memory system. Main memory consists of up to 2n addressable words, with each word having a unique n-bit address. For mapping purposes, this memory is considered to consist of a number of fixed length blocks of K words each. That is, there are M = ((2^n)/K) blocks in main memory.
The cache consists of 
m blocks, called lines.3 Each line contains K words, plus a tag of a few bits. Each line also includes control bits (not shown), such as a bit to indicate whether the line has been modified since being loaded into the cache. The length of a line, not including tag and control bits, is the line size.The line size may be as small as 32 bits, with each “word” being a single byte; in this case, the line size is 4 bytes.
The number of lines is considerably less than the number of main memory blocks (
m << M). At any time, some subset of the blocks of memory resides in lines in the cache. If a word in a block of memory is read, that block is transferred to one of the lines of the cache. Because there are more blocks than lines, an individual line cannot be uniquely and permanently dedicated to a particular block. Thus, each line includes a tag that identifies which particular block is currently being stored. The tag is usually a portion of the main memory address, as described later in this section.
3 Above Figure illustrates the read operation. The processor generates the read address (RA) of a word to be read. If the word is contained in the cache, it is delivered to the processor. Otherwise, the block containing that word is loaded into the cache, and the word is delivered to the processor. Above Figure shows these last two operations occurring in parallel and reflects the organization shown in below Figure, which is typical of contemporary cache organizations.

4In this organization, the cache connects to the processor via data, control, and address lines.The data and address lines also attach to data and address buffers, which attach to a system bus from which main memory is reached. When a cache hit occurs, the data and address buffers are disabled and communication is only between processor and cache, with no system bus traffic. When a cache miss occurs, the desired address is loaded onto the system bus and the data are returned through the data buffer to both the cache and the processor. In other organizations, the cache is physically interposed between the
processor and the main memory for all data, address, and control lines. In this latter case, for a cache miss, the desired word is first read into the cache and then transferred from cache to processor.

Next-Gen Sensors Make Golf Clubs, Tennis Rackets, and Baseball Bats Smarter Than Ever

Sensor fusion and integrated MEMS are essential tools for today’s athletes


A golfer stands in the dreaded sand trap, carefully considering how to balance his weight as he eyes the ball. He takes a few practice swings. If he swings too deeply, he’ll hit the ground and lose another stroke. It’s a tough shot, but he swings without hesitation. Embedded in his club are microelectromechanical system (MEMS) devices—tiny machines with elements about the thickness of a human hair. These devices aren’t going to swing the club for him, but he’s been using them to analyze his swing and practice this shot. Maybe this time he’ll make it.
mjcymdkzmgThe wild popularity of smartphones and wearables has been driving down the cost of MEMS devices, including accelerometers, gyroscopes, magnetometers, and pressure sensors. These minuscule chips help to count steps, track calories burned, and monitor heart rate. Such data are useful, sure, but while these devices may nudge users to be more active, they don’t actually improve a swing, a punch, or a kick. To do so means moving sensors off the wrist and into sports gear—and that’s quickly happening. Indeed, you can now buy sensor-based equipment that can boost your performance, not only for golf but also for tennis, baseball, boxing, and soccer.

Equipment: Babolat Pure Drive Play racket

Sensors on board: InvenSense motion-sensing system embedded in its handle

What it tracks: Type of shot made (forehand, backhand, serve, and smash), location where the tennis ball connects with the racket’s strings, overall playing time versus active playing time, and ball speed during play and when serving

How it works: Players can connect the racket via Bluetooth to a mobile device to share data with a coach for postgame analysis or over social media.

Commercial status: Announced at French Open 2013; available now at US $200

Manufacturer: Babolat

Measuring the often-complex motion of an athlete takes many more metrics than just tracking steps. Consider the sport of sculling: To gauge the efficiency of a rower as his oar moves through the phases of catch, drive, release, and recovery, you need to track the movement of his legs, back, and arms. If you want to analyze a baseball player as he whips the bat around, you need to consider rotational angles and swing speed.

The current boom in sensor-laden sports equipment is an outgrowth of the dramatic drop in sensor prices and the development of technology that makes it easy to integrate data from multiple sensors. In the past, synthesizing the data outputs from multiple sensors in real time was a nightmare. Figuring out how to make sense of streams of data flying into a general-purpose processor—so-called sensor fusion—presented a real hurdle to developing sports-training products that used such data, even though the need was clear.

Read More…

Setting up Keil for Your First LED Blinking Program on STM32F7 Discovery Board

The STM32F745xx and STM32F746xx devices are based on the high-performance ARM®Cortex®-M7 32-bit RISC core operating at up to 216 MHz frequency. The Cortex®-M7 core features a single floating point unit (SFPU) precision which supports all ARM®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances the application security.

The STM32F745xx and STM32F746xx devices incorporate high-speed embedded memories with a Flash memory up to 1 Mbyte, 320 Kbytes of SRAM (including 64 Kbytes of Data TCM RAM for critical real-time data), 16 Kbytes of instruction TCM RAM (for critical real-time routines), 4 Kbytes of backup SRAM available in the lowest power modes, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, a 32-bit multi-AHB bus matrix and a multi-layer AXI interconnect supporting internal and external memories access.

stm32f7 discovery board.png

PI_1 is connected with the LED1. Please follow the steps as given below to program board LED1.

Step1: Download keil uvision 5 from given link after filling the contact information. https://www.keil.com/demo/eval/arm.htm

Step2: Download STM32cubeMx from given link.

Step3: Watch the video for complete instruction

LM35 Temperature Sensor and LCD Display interfacing with AVR ATmega32

In this project, we are going to design a circuit for measuring temperature. This circuit is developed using “LM35”, a linear voltage sensor. Temperature is usually measured in “Centigrade” or “Fahrenheit”. “LM35” sensor provides the output based on the scale of centigrade.

LM35 is three pin transistor-like device. It has VCC, GND, and OUTPUT. This sensor provides the variable voltage at the output based on temperature.


As shown in above figure, for every +1 centigrade rise in temperature there will be +10mV higher output. So if the temperature is 0◦centigrade the output of sensor will be 0V, if the temperature is 10◦ centigrade the output of sensor will be +100mV, if the temperature is 25◦ centigrade the output of sensor will be +250mV.

2016-09-11 (1).png

So for now with LM35 we get the temperature in the form of variable voltage. This temperature dependent voltage is given as input to ADC (Analog to Digital Converter) of ATMEGA32A. The digital value after conversion obtained is shown in the 16×2 LCD as temperature.

System Identification using Adaptive LMS and Normalized LMS Filter in MATLAB

There are four major types of adaptive filtering configurations; adaptive system identification, adaptive noise cancellation, adaptive linear prediction, and adaptive inverse system. All of the above systems are similar in the implementation of the algorithm but different in system configuration. All 4 systems have the same general parts; an input x(n), a desired result d(n), an output y(n), an adaptive transfer function w(n), and an error signal e(n) which is the difference between the desired output u(n) and the actual output y(n). In addition to these parts, the system identification and the inverse system configurations have an unknown linear system u(n) that can receive an input and give a linear output to the given input.


Adaptive System Identification Configuration:

The adaptive system identification is primarily responsible for determining a discrete estimation of the transfer function for an unknown digital or analog system. The same input x(n) is applied to both the adaptive filter and the unknown system from which the outputs are compared (see figure 1). The output of the adaptive filter y(n) is subtracted from the output of the unknown system resulting in a desired signal d(n).

The resulting difference is an error signal e(n) used to manipulate the filter coefficients of the adaptive system trending towards an error signal of zero.  After a number of iterations of this process are performed, and if the system is designed correctly, the adaptive filter’s transfer function will converge to, or near to, the unknown system’s transfer function. For this configuration, the error signal does not have to go to zero, although convergence to zero is the ideal situation, to closely approximate the given system. There will, however, be a difference between adaptive filter transfer function and the unknown system transfer function if the error is nonzero and the magnitude of that difference will be directly related to the magnitude of the error signal.

Additionally, the order of the adaptive system will affect the smallest error that the system can obtain. If there are insufficient coefficients in the adaptive system to model the unknown system, it is said to be under specified. This condition may cause the error to converge to a nonzero constant instead of zero. In contrast, if the adaptive filter is over specified, meaning that 3 there are more coefficients than needed to model the unknown system, the error will converge to zero, but it will increase the time it takes for the filter to converge.

STM32 Nucleo Board Programming – UART printf Coding in Keil using STM32CubeMx

NUCLEO-F401RE – STM32 Nucleo-64 development board with STM32F401RE MCU, supports Arduino and ST morpho connectivity – STMicroelectronics

The STM32 Nucleo board provides an affordable and flexible way for users to try out new ideas and build prototypes with any STM32 microcontroller line, choosing from the various combinations of performance, power consumption and features. The Arduino™ connectivity support and ST Morpho headers make it easy to expand the functionality of the STM32 Nucleo open development platform with a wide choice of specialized shields. The STM32 Nucleo board does not require any separate probe as it integrates the ST-LINK/V2-1 debugger and programmer. The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together with various packaged software examples, as well as direct access to mbed online resources.

Nucleo Board.PNG

The USART2 interface available on PA2 and PA3 of the STM32 microcontroller can be connected to ST-LINK MCU, ST morpho connector or to Arduino connector. The choice can be changed by setting the related solder bridges. By default, the USART2 communication between the target MCU and ST-LINK MCU is enabled, in order to support Virtual Com Port for mbed (SB13 and SB14 ON, SB62 and SB63 OFF). If the communication between the target MCU PA2 (D1) or PA3 (D0) and shield or extension board is required, SB62 and SB63 should be ON, SB13 and SB14 should be OFF. In such case it is possible to connect another USART to ST-LINK MCU using flying wires between ST morpho connector and CN3.